research
∙
09/18/2023
From RTL to SVA: LLM-assisted generation of Formal Verification Testbenches
Formal property verification (FPV) has existed for decades and has been ...
share
research
∙
04/19/2023
Massive Data-Centric Parallelism in the Chiplet Era
Recent works have introduced task-based parallelization schemes to accel...
research
∙
09/29/2022
Wafer-Scale Fast Fourier Transforms
We have implemented fast Fourier transforms for one, two, and three-dime...
research
∙
07/26/2022
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications
Applications with low data reuse and frequent irregular memory accesses,...
research
∙
04/08/2021
AutoSVA: Democratizing Formal Verification of RTL Module Interactions
Modern SoC design relies on the ability to separately verify IP blocks r...
research
∙
04/16/2020
