research
∙
09/11/2023
Multiplierless Design of High-Speed Very Large Constant Multiplications
In cryptographic algorithms, the constants to be multiplied by a variabl...
share
research
∙
08/11/2023
SALSy: Security-Aware Layout Synthesis
Integrated Circuits (ICs) are the target of diverse attacks during their...
research
∙
05/25/2023
An Overview of FPGA-inspired Obfuscation Techniques
Building and maintaining a silicon foundry is a costly endeavor that req...
research
∙
01/26/2023
Hybrid Protection of Digital FIR Filters
A digital Finite Impulse Response (FIR) filter is a ubiquitous block in ...
research
∙
09/05/2022
Leveraging Layout-based Effects for Locking Analog ICs
While various obfuscation methods exist in the digital domain, technique...
research
∙
08/19/2022
A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts
A potential vulnerability for integrated circuits (ICs) is the insertion...
research
∙
07/12/2022
A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs
Numerous threats are associated with the globalized integrated circuit (...
research
∙
05/21/2022
Multiplierless Design of Very Large Constant Multiplications in Cryptography
This brief addresses the problem of implementing very large constant mul...
research
∙
05/19/2022
Obfuscating the Hierarchy of a Digital IP
Numerous security threats are emerging from untrusted players in the int...
research
∙
04/01/2022
Preventing Distillation-based Attacks on Neural Network IP
Neural networks (NNs) are already deployed in hardware today, becoming v...
research
∙
02/21/2022
Hardware Obfuscation of Digital FIR Filters
A finite impulse response (FIR) filter is a ubiquitous block in digital ...
research
∙
01/04/2022
Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection
Globalization in the semiconductor industry enables fabless design house...
research
∙
12/06/2021
Hardware Trojan Insertion in Finalized Layouts: a Silicon Demonstration
Owning a high-end semiconductor foundry is a luxury very few companies c...
research
∙
11/11/2021
G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators
Modern Systems on Chip (SoC), almost as a rule, require accelerators for...
research
∙
10/11/2021
From FPGAs to Obfuscated eASICs: Design and Security Trade-offs
Threats associated with the untrusted fabrication of integrated circuits...
research
∙
09/16/2021
Design Space Exploration of SABER in 65nm ASIC
This paper presents a design space exploration for SABER, one of the fin...
research
∙
08/19/2021
A Tutorial on Design Obfuscation: from Transistors to Systems
The recent advances in the area of design obfuscation are encouraging, b...
research
∙
05/20/2021
A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization
The roll-out of technologies like 5G and the need for multi-terabit band...
research
∙
05/13/2021
High-level Intellectual Property Obfuscation via Decoy Constants
This paper presents a high-level circuit obfuscation technique to preven...
research
∙
04/09/2021
Side-Channel Attacks on Triple Modular Redundancy Schemes
The interplay between security and reliability is poorly understood. Thi...
research
∙
02/01/2021
Side-Channel Trojan Insertion – a Practical Foundry-Side Attack via ECO
Design companies often outsource their integrated circuit (IC) fabricati...
research
∙
01/27/2021
An Open-source Library of Large Integer Polynomial Multipliers
Polynomial multiplication is a bottleneck in most of the public-key cryp...
research
∙
09/15/2020
A Systematic Study of Lattice-based NIST PQC Algorithms: from Reference Implementations to Hardware Accelerators
Security of currently deployed public key cryptography algorithms is for...
research
∙
06/08/2020
A Survey on Split Manufacturing: Attacks, Defenses, and Challenges
In today's integrated circuit (IC) ecosystem, owning a trusted foundry i...
research
∙
05/21/2020
Latch-Based Logic Locking
Globalization of IC manufacturing has led to increased security concerns...
research
∙
05/20/2020
