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08/29/2023
PALS: Distributed Gradient Clocking on Chip
Consider an arbitrary network of communicating modules on a chip, each r...
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03/24/2023
On the Susceptibility of QDI Circuits to Transient Faults
By design, quasi delay-insensitive (QDI) circuits exhibit higher resilie...
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04/22/2021
A Composable Glitch-Aware Delay Model
We introduce the Composable Involution Delay Model (CIDM) for fast and a...
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03/12/2021
Reaching Agreement in Competitive Microbial Systems
In this work, we consider distributed agreement tasks in microbial distr...
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10/05/2020
Synchronizer-Free Digital Link Controller
This work presents a producer-consumer link between two independent cloc...
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06/15/2020
A Faithful Binary Circuit Model with Adversarial Noise
Accurate delay models are important for static and dynamic timing analys...
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03/22/2020
Distributed Computation with Continual Population Growth
Computing with synthetically modified bacteria is a vibrant and active f...
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03/11/2020
PALS: Plesiochronous and Locally Synchronous Systems
Consider an arbitrary network of communicating modules on a chip, each r...
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02/18/2020
Synthesis in Presence of Dynamic Links
The problem of distributed synthesis is to automatically generate a dist...
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01/21/2019
On the Radius of Nonsplit Graphs and Information Dissemination in Dynamic Networks
A nonsplit graph is a directed graph where each pair of nodes has a comm...
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05/13/2018
