research
∙
12/13/2021
Synapse Compression for Event-Based Convolutional-Neural-Network Accelerators
Manufacturing-viable neuromorphic chips require novel computer architect...
share
research
∙
12/11/2019
Ratatoskr: An open-source framework for in-depth power, performance and area analysis in 3D NoCs
We introduce ratatoskr, an open-source framework for in-depth power, per...
research
∙
09/30/2019
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips
For a system-level design of Networks-on-Chip for 3D heterogeneous Syste...
research
∙
09/10/2019
