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12/22/2022
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs
Multi-die FPGAs are widely adopted to deploy large hardware accelerators...
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10/17/2022
AMF-Placer 2.0: Open Source Timing-driven Analytical Mixed-size Placer for Large-scale Heterogeneous FPGA
On modern field-programmable gate arrays (FPGAs), certain critical path ...
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12/11/2020
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System
Decision trees are machine learning models commonly used in various appl...
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09/03/2020
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors
Modern multicore systems are migrating from homogeneous systems to heter...
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09/03/2020
Decision Tree Based Hardware Power Monitoring for Run Time Dynamic Power Management in FPGA
Fine-grained runtime power management techniques could be promising solu...
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09/03/2020
An Ensemble Learning Approach for In-situ Monitoring of FPGA Dynamic Power
As field-programmable gate arrays become prevalent in critical applicati...
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09/03/2020
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA
Decision trees are machine learning models commonly used in various appl...
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09/02/2020
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis
High-level synthesis (HLS) enables designers to customize hardware desig...
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06/05/2020
FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications
Fast and accurate depth estimation, or stereo matching, is essential in ...
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05/06/2019
