research
∙
09/18/2023
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency
The ever-increasing computational and storage requirements of modern app...
share
research
∙
07/17/2023
Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster
Synchronization is likely the most critical performance killer in shared...
research
∙
05/09/2023
A High-performance, Energy-efficient Modular DMA Engine Architecture
Data transfers are essential in today's computing systems as latency and...
research
∙
03/30/2023
MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory
Shared L1 memory clusters are a common architectural pattern (e.g., in G...
research
∙
07/16/2022
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters
While parallel architectures based on clusters of Processing Elements (P...
research
∙
12/02/2021
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration
Three-dimensional integrated circuits promise power, performance, and fo...
research
∙
12/05/2020
