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06/24/2023
A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware
Graph neural networks (GNNs) are emerging for machine learning research ...
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05/25/2023
Locality and Utilization in Placement Suboptimality
The mixed-size placement benchmarks described in this book chapter direc...
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05/18/2023
ProgSG: Cross-Modality Representation Learning for Programs in Electronic Design Automation
Recent years have witnessed the growing popularity of domain-specific ac...
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01/06/2023
CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture
Dense matrix multiply (MM) serves as one of the most heavily used kernel...
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09/28/2022
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver
The continued growth in the processing power of FPGAs coupled with high ...
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09/07/2022
Democratizing Domain-Specific Computing
In the past few years, domain-specific accelerators (DSAs), such as Goog...
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09/06/2022
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
In this paper, we propose TAPA, an end-to-end framework that compiles a ...
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07/29/2022
Domain-Specific Quantum Architecture Optimization
With the steady progress in quantum computing over recent years, roadmap...
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05/16/2022
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
The emergence of high-bandwidth memory (HBM) brings new opportunities to...
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11/28/2021
Search for Optimal Systolic Arrays: A Comprehensive Automated Exploration Framework and Lessons Learned
Systolic arrays have been widely used for accelerating HPC and deep lear...
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11/24/2021
Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication
Sparse matrix-vector multiplication (SpMV) multiplies a sparse matrix wi...
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11/17/2021
Enabling Automated FPGA Accelerator Optimization Using Graph Neural Networks
High-level synthesis (HLS) has freed the computer architects from develo...
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11/10/2021
SPA-GCN: Efficient and Flexible GCN Accelerator with an Application for Graph Similarity Computation
While there have been many studies on hardware acceleration for deep lea...
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10/08/2021
Pyxis: An Open-Source Performance Dataset of Sparse Accelerators
Specialized accelerators provide gains of performance and efficiency in ...
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09/22/2021
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication
Sparse-Matrix Dense-Matrix multiplication (SpMM) is the key operator for...
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05/05/2021
TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation
Accelerating tensor applications on spatial architectures provides high ...
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10/12/2020
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
With the recent release of High Bandwidth Memory (HBM) based FPGA boards...
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09/30/2020
AutoDSE: Enabling Software Programmers Design Efficient FPGA Accelerators
Adopting FPGA as an accelerator in datacenters is becoming mainstream fo...
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09/23/2020
Extending High-Level Synthesis for Task-Parallel Programs
C/C++/OpenCL-based high-level synthesis (HLS) becomes more and more popu...
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07/30/2020
Optimal Layout Synthesis for Quantum Computing
Recent years have witnessed the fast development of quantum computing. R...
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02/22/2020
Optimality Study of Existing Quantum Computing Layout Synthesis Tools
Layout synthesis, an important step in quantum computing, processes quan...
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12/17/2018
Rapid Cycle-Accurate Simulator for High-Level Synthesis
A large semantic gap between the high-level synthesis (HLS) design and t...
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07/30/2018
AutoAccel: Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture
CPU-FPGA heterogeneous architectures are attracting ever-increasing atte...
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07/18/2018
Computed Tomography Image Enhancement using 3D Convolutional Neural Network
Computed tomography (CT) is increasingly being used for cancer screening...
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07/03/2018
Best-Effort FPGA Programming: A Few Steps Can Go a Long Way
FPGA-based heterogeneous architectures provide programmers with the abil...
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11/11/2016
Revisiting FPGA Acceleration of Molecular Dynamics Simulation with Dynamic Data Flow Behavior in High-Level Synthesis
Molecular dynamics (MD) simulation is one of the past decade's most impo...
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10/31/2016
